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Happy Birthday Tensilica
Yes, it’s Tensilica’s birthday! Twenty years ago today, on July 31, 1997, Tensilica was officially incorporated by Chris Rowen, who I knew from our Synopsys days when he was VP of the Design Reuse...
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It's a Visual World
Here’s an experiment to try: in a quiet (but crowded) Auditorium, drop a stack of plates.Hypothesis: At the first splinters of the crash, all eyes will jerk to the source of the sound.You probably...
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What’s New With Cadence PCI Express IP? Almost Everything!
PCI-SIG Developer’s Conference 2017 was held in Santa Clara, California in June this year where several hundred customers from more than a hundred unique companies visited the conference. The...
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Cadence IP Is Great for Automotive
If you’re designing chips for in-vehicle infotainment, in-cabin electronics, vision systems, digital noise reduction, and advanced driver assistance systems (ADAS), look at Cadence for the key IP to...
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USB 3.2—The USB Type-C Connector Finally Met its Match
It’s only a week before the first event of USB Developer Days, a series of meetings for USB developers, where the USB 3.2 specification will be formally announced. Much like with any recent smartphone...
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Book Your CES Meetings Now!
Want to see the exciting technology that is behind some of the biggest innovations at CES? Book a meeting now to visit the Cadence invitation-only suites at CES 2018, January 9-12, South Hall 2, Suite...
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CCIX Coherency: Verification Challenges and Approaches
Cache coherency is not a new concept. Coherent architectures have existed for many generations of CPU and Interconnect designs. Verifying adherence to coherency rules in SoCs has always been one of the...
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JEDEC UFS 3.0 Now Available in Cadence VIP Portfolio – For Mobile and...
The JEDEC UFS (Universal Flash Storage) started in 2011 with the v1.0 first specification version, supporting a bandwidth of 300 MB/s per lane. Since then JEDEC has been continuously releasing new UFS...
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You Won't Believe Your Ears When Listening to Your Laptop
I wouldn't believe it if I hadn't heard it myself on a laptop in the Cadence booth at the Consumer Electronics Show (CES) this year. Through a great innovation by our partner Dolby, you can now get...
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New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions
The recent update of the AMBA® 5 ACE/AXI specification introduces a number of significant performance improvements which help to align the protocol to the more recent AMBA® 5 CHI (Coherent Hub...
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A Walk Through DesignCon Turns Into a Long Journey
Have you ever attended the DesignCon show? I attended the recent event for the first time and was surprised by what I saw: tons of high-bandwidth coax cables, circuit boards, connectors, and other...
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What I Learned about System Design Enablement at DesignCon
While attending the recent DesignCon show for the first time, I was struck by the many displays of cables, connectors, boards, and various kinds of test equipment (you can read about the impact this...
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See You in Barcelona at MWC!
I’ve been going to Mobile World Congress in Barcelona for over 10 years, and it never fails to amaze me. This year’s theme is “Creating a Better Future” and I can’t think of a better theme for Cadence...
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New AMBA 5 ACE/AXI Specification: More About Atomic Transactions
As discussed in the previous installment of this blog, a new class of atomic transactions was introduced in the AMBA® 5 ACE/AXI specification to make operations at the remote locations more streamlined...
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Delivering on the IoT Promise with Galileo Software GPS and Tensilica DSP IP
What is a software GPS, what does it have to do with Tensilica DSP IP, and why would anyone care? To answer that, let's start with a quiz from the transportation industry. How many shipping containers...
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Why Software-Based GPS Is Great for Location-Based IoT Applications
At the Cadence booth at Mobile World Congress in Barcelona, we’re featuring a demo of a software-based GPS receiver from Galileo Satellite Navigation running off a Cadence Tensilica Fusion F1 DSP. It’s...
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NVMe Express 1.3: Addressing the Storage Needs of the Data Revolution from...
The amount of data we are generating and consuming has exploded in recent years. Social media, applications, multimedia streaming, 24-hour connectivity has us talking about Zettabytes of data in the...
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New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP
As discussed in the previous installments of the blog, the recent update of the AMBA® 5 ACE/AXI specification introduced several performance improvement features which align the AMBA5 ACE/AXI protocol...
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How We Developed and Tested a Prototype DDR5 Interface in Silicon Based on a...
We’re thrilled to have announced our prototype 7nm DDR5 IP silicon based on a preliminary version of the DDR5 standard at this week's TSMC Technology Symposium. This has been a huge amount of work from...
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PCI-SIG Developer's Conference: What's New with Gen 5 and When Will it be...
The release of PCIe 4.0 rev 1.0 in October 2017 was anticlimactic after the announcement of PCIe 5.0 rev 0.3 at last year’s PCI-SIG DevCon. Fast forward, this year’s DevCon has kicked off and the SIG...
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